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| Datasheet File OCR Text: |
| ! " white electronic designs #$$%& ! " # !$%& ' ( )* & + ,#"! " #-.% ' ( )* & + , )/ % & ' #-.% ' ()* & % (( '+ , )#-. %0'/ % & '11 % ' ( )* / % & '+ , )#-. %0' / % & '11 %' ( )* / % & '+ , ) #-.%' & % '11 %&' ()* &% (( '#-.%+' (% '11 %(' 2 3 #)4 5" 1"" ( ) 6" &78"1 9" " 9 ") * ) " ))1 i/o 0-31 data inputs/outputs a 0-18 address inputs we 1-4 write enables cs 1-4 chip selects oe output enable v cc power supply gnd ground nc not connected 512k x 8 8 i/o 0-7 we cs 1 1 512k x 8 8 i/o 8-15 we cs 2 2 512k x 8 8 i/o 16-23 we cs 3 3 512k x 8 8 i/o 24-31 we cs 4 4 a 0 - 18 oe : 6*7;/ # ) $* " )*4)" " < = )" => ?5 ) + , , #4:5 5"*9 29***2 * ) "1 +# "9)$ "*#4:5: " " 8 )"@a )# + ,b : " : " *$" ) # " ) c1" c.7/@d0d@ ( ") c.7/@d!d@/ ") c.7/b@d&d @ ") c.7/@d&d @ ") c.7/@d0d @ ") c.7/@dd@ ") c.7/@d+d@( ") ! " white electronic designs i/o0-31 data inputs/outputs a0-18 address inputs we write enable cs1-4 chip selects oe output enable vcc power supply gnd ground nc not connected i/o0-31 data inputs/outputs a0-18 address inputs we1-4 write enables cs1-4 chip selects oe output enable vcc power supply gnd ground 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 i/o 0 i/o 1 i/o 2 i/o 3 i/o 4 i/o 5 i/o 6 i/o 7 gnd i/o 8 i/o 9 i/o 10 i/o 11 i/o 12 i/o 13 i/o 14 i/o 15 v cc a 11 a 12 a 13 a 14 a 15 a 16 cs 2 oe cs 4 a 17 a 18 nc nc nc nc nc i/o 16 i/o 17 i/o 18 i/o 19 i/o 20 i/o 21 i/o 22 i/o 23 gnd i/o 24 i/o 25 i/o 26 i/o 27 i/o 28 i/o 29 i/o 30 i/o 31 nc a 0 a 1 a 2 a 3 a 4 a 5 cs 1 gnd cs 3 we a 6 a 7 a 8 a 9 a 10 v cc 512k x 8 8 i/o 0-7 cs 1 512k x 8 8 i/o 8-15 cs 2 512k x 8 8 i/o 16-23 cs 3 512k x 8 8 i/o 24-31 cs 4 a 0-18 oe we 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 i/o 0 i/o 1 i/o 2 i/o 3 i/o 4 i/o 5 i/o 6 i/o 7 gnd i/o 8 i/o 9 i/o 10 i/o 11 i/o 12 i/o 13 i/o 14 i/o 15 v cc a 11 a 12 a 13 a 14 a 15 a 16 cs 1 oe cs 2 a 17 we 2 we 3 we 4 a 18 nc nc i/o 16 i/o 17 i/o 18 i/o 19 i/o 20 i/o 21 i/o 22 i/o 23 gnd i/o 24 i/o 25 i/o 26 i/o 27 i/o 28 i/o 29 i/o 30 i/o 31 nc a 0 a 1 a 2 a 3 a 4 a 5 cs 3 gnd cs 4 we 1 a 6 a 7 a 8 a 9 a 10 v cc 512k x 8 8 i/o 0-7 cs 1 512k x 8 8 i/o 8-15 cs 2 512k x 8 8 i/o 16-23 cs 3 512k x 8 8 i/o 24-31 cs 4 a 0-18 oe we 3 we 2 we 1 we 4 ! " white electronic designs ! oe capacitance c oe v in = 0 v, f = 1.0 mhz 50 pf we 1-4 capacitance c we v in = 0 v, f = 1.0 mhz pf hip (pga) 20 cqfp g4t 50 cqfp g2u/g1u/g1t/g2l 15 cs 1-4 capacitance c cs v in = 0 v, f = 1.0 mhz 20 pf data i/o capacitance c i/o v i/o = 0 v, f = 1.0 mhz 20 pf address input capacitance c ad v in = 0 v, f = 1.0 mhz 50 pf ! " #$ #" ! input leakage current i li v cc = 5.5, v in = gnd or v cc 10 a output leakage current i lox32 v cc = 5.5, v in = gnd or v cc 10 a v cc active current for read (1) i cc1 cs = v il , oe = v ih , f = 5mhz 190 ma v cc active current for program or erase (2) i cc2 cs = v il , oe = v ih 240 ma v cc standby current i cc4 v cc = 5.5, cs = v ih , f = 5mhz 6.5 ma v cc static current i cc3 v cc = 5.5, cs = v ih 0.6 ma output low voltage v o l i ol = 8.0 ma, v cc = 4.5 0.45 v output high voltage v oh1 i oh = 2.5 ma, v cc = 4.5 0.85 x v cc v low v cc lock-out voltage v lko 3.2 4.2 v " # %!& #' #" (" $ " ' &( ("' $ #$ ) "*' "+,% -. / " ' 0 " $'/-) ./ " ). ("*' " " +,% / 1 . / " ' 0" " $'/ 1 ) ./ " ). 2 "* "' 3 -. / " ' 03 $'/ -)/ " ). ("* "' 312 / $ ' ./ " ). $ " ! ! " # " operating temperature -55 to +125 c supply voltage range (v cc ) -2.0 to +7.0 v signal voltage range (any pin except a9) (2) -2.0 to +7.0 v storage temperature range -65 to +150 c lead temperature (soldering, 10 seconds) +300 c data retention (mil temp) 20 years endurance - write/erase cycles (mil temp) 100,000 cycles min. a9 voltage for sector protect (v id ) (3) -2.0 to +14.0 v * /+45. 2/0/+65/**-. 2/ %!& !+** " "#* " 7" $ 8 69: !7" $ $ $ ) , 690 %& /+6 ) +** '&# 8 : ! supply voltage v cc 4.5 5.5 v input high voltage v ih 2.0 v cc + 0.5 v input low voltage v il -0.5 +0.8 v operating temp. (mil.) t a -55 +125 c operating temp. (ind.) t a -40 +85 c a 9 voltage for sector protect v id 11.5 12.5 v $ # " ! oe capacitance coe vin = 0 v, f = 1.0 mhz 32 pf cqfp g4 capacitance cwe vin = 0 v, f = 1.0 mhz 32 pf cs1-4 capacitance ccs vin = 0 v, f = 1.0 mhz 15 pf data i/o capacitance ci/o vi/o = 0 v, f = 1.0 mhz 15 pf address input capacitance cad vin = 0 v, f = 1.0 mhz 32 pf ! " #$ #" # " ! " white electronic designs %&' %(' %)' %*+' %*,' ! ! ! ! ! write cycle time t avav twc 60 70 90 120 150 ns write enable setup time t wlel t ws 00000ns chip select pulse width t eleh t cp 40 45 45 50 50 ns address setup time t avel t as 00000ns data setup time t dveh t ds 40 45 45 50 50 ns data hold time t ehdx t dh 00000ns address hold time t elax t ah 40 45 45 50 50 ns chip select pulse width high t ehel t cph 20 20 20 20 20 ns duration of byte programming operation (1) t whwh1 300 300 300 300 300 s sector erase time (2) t whwh2 15 15 15 15 15 sec read recovery time t ghel 00000ns chip programming time 11 11 11 11 11 sec chip erase time (3) 64 64 64 64 64 sec $ % &' & ! ! " # " /; #-)/1 !+ ;.5< /;$ $ /%6 /%4 +%4=+%6 ?"" $ ' " !& "? - input pulse levels v il = 0, v ih = 3.0 v input rise and fall 5 ns input and output reference level 1.5 v output timing reference level 1.5 v %!& !$ ' "@6@6 ' "@6@6) 2 !$ ' "* & !b ! " white electronic designs %&' %(' %)' %*+' %*,' ! ! ! ! ! read cycle time t avav t rc 60 70 90 120 150 ns address access time t avqv t acc 60 70 90 120 150 ns chip select access time t elqv t ce 60 70 90 120 150 ns output enable to output valid t glqv t oe 30 35 35 50 55 ns chip select to output high z (1) t ehqz t df 20 20 20 30 35 ns output enable high to output high z (1) t ghqz t df 20 20 20 30 35 ns output hold from address, cs or oe change, t axqx t oh 000 00ns whichever is first ! ! ! ! ! write cycle time t avav t wc 60 70 90 120 150 ns chip select setup time t elwl t cs 00000ns write enable pulse width t wlwh t wp 40 45 45 50 50 ns address setup time t avwh t as 00000ns data setup time t dvwh t ds 40 45 45 50 50 ns data hold time t whdx t dh 00000ns address hold time t whax t ah 40 45 45 50 50 ns write enable pulse width high t whwl t wph 20 20 20 20 20 ns duration of byte programming operation (1) t whwh1 300 300 300 300 300 s sector erase time (2) t whwh2 15 15 15 15 15 sec read recovery time before write t ghwl 00000ns v cc set-up time t vcs 50 50 50 50 50 s chip programming time 11 11 11 11 11 sec output enable setup time t oes 00000ns output enable hold time (4) t oeh 10 10 10 10 10 ns chip erase time (3) 64 64 64 64 64 sec $ % &' & ' ! " # " wf512k32-xxx5 wf512k32-xxx5 $ % . ! " # " %!& !$ ' "@6@6 ' "@6@6) 2 !$ ' "* & !b ! c" #$ 0#" %&' %(' %)' %*+' %*,' ! " white electronic designs ( / ! " white electronic designs %!& $ # ) # #$ 2 <" " ' 8 : %d!" " ' " #" $ "#" $ 7" ) &' & ' ! " white electronic designs * / $ & ' %!& & a ddresses cs oe we data v cc 5555h 2aaah 2aaah sa 5555h 5555h t wp t cs t vcs 10h/30h 55h 80h 55h aah aah t ah t as t ghwl t wph t dh t ds ! " white electronic designs + / ' " $ cs oe we t oe t ce t ch t oh d7 d7 = valid data high z d0-d6 = invalid d0-d7 valid data t df d7 d0-d6 t oeh t whwh 1 or 2 t oe data ! " white electronic designs , $ # ) # #$ 2 <" " ' 8 : %d!" " ' " #" $ "#" $ 7" ! " white electronic designs !!-)) . # ( 444+& + &+% & +44+ &!& &!6&!+*44e++*6& ! " white electronic designs !-)+ $ $ oo 444+& + &+% & +44+ &!& &!6&!+*44e++*6& 0.940" the white 68 lead g2u cqfp fills the same fit and function as the jedec 68 lead cqfj or 68 plcc. but the g2u has the tce and lead inspection advantage of the cqfp form. ,- )+ $ $ 444+& + &+% & +44+ &!& &!6&!+*44e++*6& ! " white electronic designs 25.15 (0.990) C 0.25 (0.010) max 22.36 (0.880) C 0.25 (0.010) max 20.31 (0.800) ref 0.38 (0.015) C 0.05 (0.002) 1.27 (0.050) typ 5.10 (0.200) max 0.25 (0.010) C 0.10 (0.002) 24.0 (0.946) C 0.25 (0.010) 0.23 (0.009) ref r 0.127 (0.005) 2 o / 9 o 0.89 (0.035) C 1.14 (0.045) 1.37 (0.054) min 0.004 25.27 (0.995) 0.13 (0.005) sq 23.88 (0.940) 0.25 (0.010) sq 0.38 (0.015) 0.05 (0.002) 20.3 (0.800) ref 1.27 (0.050) 4.06 (0.160) max 0.25 (0.010) max see detail "a" 0.84 (0.033) ref detail a 0.83 (0.033) 0.32 (0.013) 0 0 /8 0 - )+ $ $ 444+& + &+% & +44+ &!& &!6&!+*44e++*6& 0.940" typ +-)+'' ( $ $ 444+& + &+% & +44+ &!& &!6&!+*44e++*6& ! " white electronic designs 444+& + &+% & +44+ &!& &!6&!+*44e++*6& 0.38 (0.015) 0.08 (0.003) 68 places 1.27 (0.050) typ 5.1 (0.200) ma x 39.6 (1.56) 0.38 (0.015) sq 38 (1.50) typ 4 places 5.1 (0.200) 0.25 (0.010) 4 places 12.7 (0.500) 0.5 (0.020) 4 places 0.25 (0.010) 0.05 (0.002) 1.27 (0.050) 0.1 (0.005) pin 1 identifier pin 1 ! - )+ $ $ 0.38 (0.015) 0.08 (0.003) 68 places 1.27 (0.050) typ 5.1 (0.200) ma x 39.6 (1.56) 0.38 (0.015) sq 38 (1.50) typ 4 places 5.1 (0.200) 0.25 (0.010) 4 places 12.7 (0.500) 0.5 (0.020) 4 places 0.25 (0.010) 0.05 (0.002) 1.27 (0.050) 0.1 (0.005) pin 1 identifier pin 1 !- )+ $ $ 444+& + &+% & +44+ &!& &!6&!+*44e++*6& ! " white electronic designs ( $0 / / / 0 ! " #$%" & '(" # " ! (" #)(" .0 *$ $+(),-+ !* . /!0 1*/2/!0 '((34 %5%%+' !& 6 /!1 7/ 8 6/2/!0 $(4 %%%+' !& 6 /!1 6/2/!0 % 4 $% +9 7/ 8 6/2/!0 %'4 $5 % +9 !& 6 /!1 7/ 8 6/2/!0 $94 ' '( 7/ 8 6/2/!0 ($4 ' '( 7/ 8 6/2/!0 (%4 1 2 / :: ! %$ 9*/8 5 0 3 4,*+ !5+ 5 ! 80&; $.$< %. $ $ 6 3 8! 8 / 2*/4 !0 ! " white electronic designs ! ""# ! ""# ! ""# ! """# $ %&'()* +", ! ",# $ %&'()* +", ! ",# $ %&'()* +", ! ",# $ %&'()* +", ! "",# $ '(% -. - ! "/# %&+" $ '(% -. - ! "/# %&+" $ '(% -. - ! "/# %&+" $ '(% -. - ! ""/# %&+" $ %&01+2 ! " 3# $ %&01+2 ! " 3# $ %&01+2 ! " 3# $ %&01+2 ! " "3# $ %&+2 ! " # $ %&+2 ! " # $ %&+2 ! " # $ %&+2 ! "" # $ %&+' ! " 4# $ %&+' ! " 4# $ %&+' ! " 4# $ %&+' ! " "4# |
Price & Availability of WF512K32N-XH1X5
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